Intel Pentium CPU Instruction Set Reference
AND instruction - Logical AND
| Code |
Mnemonic |
Description |
| 24 ib |
AND AL, imm8 AL |
AND imm8 |
| 25 iw |
AND AX, imm16 AX |
AND imm16 |
| 25 id |
AND EAX, imm32 EAX |
AND imm32 |
| 80 /4 ib |
AND r/m8, imm8 r/m8 |
AND imm8 |
| 81 /4 iw |
AND r/m16, imm16 r/m16 |
AND imm16 |
| 81 /4 id |
AND r/m32, imm32 r/m32 |
AND imm32 |
| 83 /4 ib |
AND r/m16, imm8 r/m16 |
AND imm8 (sign-extended) |
| 83 /4 ib |
AND r/m32, imm8 r/m32 |
AND imm8 (sign-extended) |
| 20 /r |
AND r/m8, r8 r/m8 |
AND r8 |
| 21 / r |
AND r/m16, r16 r/m16 |
AND r16 |
| 21 / r |
AND r/m32, r32 r/m32 |
AND r32 |
| 22 / r |
AND r8, r/m8 r8 |
AND r/m8 |
| 23 / r |
AND r16, r/m16 r16 |
AND r/m16 |
| 23 / r |
AND r32, r/m32 r32 |
AND r/m32 |
Description
Performs a bitwise AND operation on the destination (first) and source (second) operands and stores the result in the destination operand location. The source operand can be an immediate, a register, or a memory location; the destination operand can be a register or a memory location. (However, two memory operands cannot be used in one instruction.) Each bit of the result of the AND instruction is a 1 if both corresponding bits of the operands are 1; otherwise, it becomes a 0.
| Operands |
Bytes |
Clocks |
| reg, reg |
2 |
1 |
UV |
| mem, reg |
2 + d(0, 2) |
3 |
UV |
| reg, mem |
2 + d(0, 2) |
2 |
UV |
| reg, imm |
2 + i(1, 2) |
1 |
UV |
| mem, imm |
2 + d(0, 2) + i(1, 2) |
3 |
UV ( not pairable if there is a displacement and immediate) |
| acc, imm |
1 + i(1, 2) |
1 |
UV |
Flags
| ID |
unaffected |
DF |
unaffected |
| VIP |
unaffected |
IF |
unaffected |
| VIF |
unaffected |
TF |
unaffected |
| AC |
unaffected |
SF |
sets according to the result |
| VM |
unaffected |
ZF |
sets according to the result |
| RF |
unaffected |
AF |
undefined |
| NT |
unaffected |
PF |
sets according to the result |
| IOPL |
unaffected |
CF |
cleared |
| OF |
cleared |
