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Intel Pentium CPU Instruction Set Reference

BTS instruction - Bit Test and Set

Code Mnemonic Description
0F AB BTS r/m16, r16 Store selected bit in CF flag and set
0F AB BTS r/m32, r32 Store selected bit in CF flag and set
0F BA /5 ib BTS r/m16, imm8 Store selected bit in CF flag and set
0F BA /5 ib BTS r/m32, imm8 Store selected bit in CF flag and set

Description

Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and sets the selected bit in the bit string to 1. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value. If the bit base operand specifies a register, the instruction takes the modulo 16 or 32 (depending on the register size) of the bit offset operand, allowing any bit position to be selected in a 16- or 32-bit register, respectively (see Figure 3-1). If the bit base operand specifies a memory location, it represents the address of the byte in memory that contains the bit base (bit 0 of the specified byte) of the bit string (see Figure 3-2). The offset operand then selects a bit position within the range -2^31 to 2^31 - 1 for a register offset and 0 to 31 for an immediate offset.

Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See "BT — Bit Test" for more information on this addressing mechanism.

Operands Bytes Clocks
reg, reg 3 7 NP
mem, reg 3 + d(0, 1, 2, 4) 13 NP
reg, imm8 3 + i(1) 7 NP
mem, imm8 3 + d(0, 1, 2, 4) + i(1) 8 NP

Flags

ID unaffected DF unaffected
VIP unaffected IF unaffected
VIF unaffected TF unaffected
AC unaffected SF undefined
VM unaffected ZF undefined
RF unaffected AF undefined
NT unaffected PF undefined
IOPL unaffected CF contains the value of the selected bit before it is set
OF undefined

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