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Intel Pentium CPU Instruction Set Reference

IDIV instruction - Signed Divide

Code Mnemonic Description
F6 /7 IDIV r/m8 Signed divide AX (where AH must contain sign-extension of AL) by r/m byte. (Results: AL=Quotient, AH=Remainder)
F7 /7 IDIV r/m16 Signed divide DX:AX (where DX must contain sign-extension of AX) by r/m word. (Results: AX=Quotient, DX=Remainder)
F7 /7 IDIV r/m32 Signed divide EDX:EAX (where EDX must contain sign-extension of EAX) by r/m doubleword. (Results: EAX=Quotient, EDX=Remainder)


Divides (signed) the value in the AL, AX, or EAX register by the source operand and stores the result in the AX, DX:AX, or EDX:EAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size, as shown in the following table:

Operand Size Dividend Divisor Quotient Remainder Quotient Range
Word / Byte AX r/m8 AL AH -128 to +127
Doubleword / Word DX:AX r/m16 AX DX -32,768 to +32,767
Quadword / Doubleword EDX:EAX r/m32 EAX EDX -2,147,483,648 to 4,294,967,295 (-2^31 to 2^32 - 1)

Non-integral results are truncated (chopped) towards 0. The sign of the remainder is always the same as the sign of the dividend. The absolute value of the remainder is always less than the absolute value of the divisor. Overflow is indicated with the #DE (divide error) exception rather than with the OF (overflow) flag.

Operands Bytes Clocks
r8 2 22 NP
r16 2 30 NP
r32 2 46 NP
mem8 2 + d(0 - 2) 22 NP
mem16 2 + d(0 - 2) 30 NP
mem32 2 + d(0 - 2) 46 NP


ID unaffected DF unaffected
VIP unaffected IF unaffected
VIF unaffected TF unaffected
AC unaffected SF undefined
VM unaffected ZF undefined
RF unaffected AF undefined
NT unaffected PF undefined
IOPL unaffected CF undefined
OF undefined