Intel Pentium CPU Instruction Set Reference
LEA instruction - Load Effective Address
| Code |
Mnemonic |
Description |
| 8D / r |
LEA r16, m |
Store effective address for m in register r16 |
| 8D / r |
LEA r32, m |
Store effective address for m in register r32 |
Description
Computes the effective address of the second operand (the source operand) and stores it in the first operand (destination operand). The source operand is a memory address (offset part) specified with one of the processors addressing modes; the destination operand is a general-purpose register. The address-size and operand-size attributes affect the action performed by this instruction, as shown in the following table. The operand-size attribute of the instruction is determined by the chosen register; the address-size attribute is determined by the attribute of the
codesegment.
| Operand Size |
Address Size |
Action Performed |
| 16 |
16 |
16-bit effective address is calculated and stored in requested 16-bit register destination. |
| 16 |
32 |
32-bit effective address is calculated. The lower 16 bits of the address are stored in the requested 16-bit register destination. |
| 32 |
16 |
16-bit effective address is calculated. The 16-bit address is zero-extended and stored in the requested 32-bit register destination. |
| 32 |
32 |
32-bit effective address is calculated and stored in the requested
32-bit register destination. |
| Operands |
Bytes |
Clocks |
| r16, mem |
2 + d(2) |
1 |
UV |
| r32, mem |
2 + d(2) |
1 |
UV |
Flags
| ID |
unaffected |
DF |
unaffected |
| VIP |
unaffected |
IF |
unaffected |
| VIF |
unaffected |
TF |
unaffected |
| AC |
unaffected |
SF |
unaffected |
| VM |
unaffected |
ZF |
unaffected |
| RF |
unaffected |
AF |
unaffected |
| NT |
unaffected |
PF |
unaffected |
| IOPL |
unaffected |
CF |
unaffected |
| OF |
unaffected |
