| Code | Mnemonic | Description |
|---|---|---|
| 0F 00 /3 | LTR r/m16 | Load r/m16 into task register |
Loads the source operand into the segment selector field of the task register. The source operand (a general-purpose register or a memory location) contains a segment selector that points to a task state segment (TSS). After the segment selector is loaded in the task register, the processor uses the segment selector to locate the segment descriptor for the TSS in the global descriptor table (GDT). It then loads the segment limit and base address for the TSS from the segment descriptor into the task register. The task pointed to by the task register is marked busy, but a switch to the task does not occur.
The LTR instruction is provided for use in operating-system software; it should not be used in application programs. It can only be executed in protected mode when the CPL is 0. It is commonly used in initialization code to establish the first task to be executed.
The operand-size attribute has no effect on this instruction.
| Operands | Bytes | Clocks | |
|---|---|---|---|
| r16 | 3 | 10 | NP |
| mem16 | 3 + d(0, 2) | 10 | NP |
| ID | unaffected | DF | unaffected |
|---|---|---|---|
| VIP | unaffected | IF | unaffected |
| VIF | unaffected | TF | unaffected |
| AC | unaffected | SF | unaffected |
| VM | unaffected | ZF | unaffected |
| RF | unaffected | AF | unaffected |
| NT | unaffected | PF | unaffected |
| IOPL | unaffected | CF | unaffected |
| OF | unaffected |
