Quick navigation: [ Jump to body ]

Quick navigation: [ Jump to menu ]

Intel Pentium CPU Instruction Set Reference

MUL instruction - Unsigned Multiply

Code Mnemonic Description
F6 /4 MUL r/m8 Unsigned multiply (AX = AL * r/m8)
F7 /4 MUL r/m16 Unsigned multiply (DX:AX = AX * r/m16)
F7 /4 MUL r/m32 Unsigned multiply (EDX:EAX = EAX * r/m32)


Performs an unsigned multiplication of the first operand (destination operand) and the second operand (source operand) and stores the result in the destination operand. The destination operand is an implied operand located in register AL, AX or EAX (depending on the size of the operand); the source operand is located in a general-purpose register or a memory location. The action of this instruction and the location of the result depends on the opcode and the operand size as shown in the following table.

Operand Size Source 1 Source 2 Destination
Byte AL r/m8 AX
Word AX r/m16 DX:AX
Doubleword EAX r/m32 EDX:EAX

The result is stored in register AX, register pair DX:AX, or register pair EDX:EAX (depending on the operand size), with the high-order bits of the product contained in register AH, DX, or EDX, respectively. If the high-order bits of the product are 0, the CF and OF flags are cleared; otherwise, the flags are set.

Operands Bytes Clocks
r8 2 11 NP
r16 2 11 NP
r32 2 10 NP
mem8 2 + d(0 - 2) 11 NP
mem16 2 + d(0 - 2) 11 NP
mem32 2 + d(0 - 2) 10 NP


implied multiplicand operand result (multiplier)
AL * byte = AX
AX * word = DX:AX
EAX * dword = EDX:EAX


ID unaffected DF unaffected
VIP unaffected IF unaffected
VIF unaffected TF unaffected
AC unaffected SF undefined
VM unaffected ZF undefined
RF unaffected AF undefined
NT unaffected PF undefined
IOPL unaffected CF cleared to 0 if the upper half of the result is 0; otherwise, they are set to 1
OF cleared to 0 if the upper half of the result is 0; otherwise, they are set to 1