Intel Pentium CPU Instruction Set Reference

OUT instruction - Output to Port

Code	Mnemonic	Description
E6 ib	OUT imm8, AL	Output byte in AL to I/O port address imm8
E7 ib	OUT imm8, AX	Output word in AX to I/O port address imm8
E7 ib	OUT imm8, EAX	Output doubleword in EAX to I/O port address imm8
EE	OUT DX, AL	Output byte in AL to I/O port address in DX
EF	OUT DX, AX	Output word in AX to I/O port address in DX
EF	OUT DX, EAX	Output doubleword in EAX to I/O port address in DX

Description

Copies the value from the second operand (source operand) to the I/O port specified with the destination operand (first operand). The source operand can be register AL, AX, or EAX, depending on the size of the port being accessed (8, 16, or 32 bits, respectively); the destination operand can be a byte-immediate or the DX register. Using a byte immediate allows I/O port addresses 0 to 255 to be accessed; using the DX register as a source operand allows I/O ports from 0 to 65,535 to be accessed.

The size of the I/O port being accessed is determined by the opcode for an 8-bit I/O port or by the operand-size attribute of the instruction for a 16- or 32-bit I/O port.

At the machine code level, I/O instructions are shorter when accessing 8-bit I/O ports. Here, the upper eight bits of the port address will be 0.

This instruction is only useful for accessing I/O ports located in the processor's I/O address space.

Operands	Bytes	Clocks
imm8, al	2	12	NP
imm8, ax	2	12	NP
imm8, eax	2	12	NP
dx, al	1	12	NP
dx, ax	1	12	NP
dx, eax	1	12	NP

Protected Mode

Operands	Bytes	Clocks
imm8, acc	2	9/26/24	NP
dx, acc	1	9/26/24	NP

Cycles for: CPL <= IOPL / CPL > IOPL / V86

Flags

ID	unaffected	DF	unaffected
VIP	unaffected	IF	unaffected
VIF	unaffected	TF	unaffected
AC	unaffected	SF	unaffected
VM	unaffected	ZF	unaffected
RF	unaffected	AF	unaffected
NT	unaffected	PF	unaffected
IOPL	unaffected	CF	unaffected
OF	unaffected

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