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Intel Pentium CPU Instruction Set Reference

STI instruction - Set Interrupt Flag

Code Mnemonic Description
FB STI Set interrupt flag; external, maskable interrupts enabled at the end of the next instruction

Description

Sets the interrupt flag (IF) in the EFLAGS register. After the IF flag is set, the processor begins responding to external, maskable interrupts after the next instruction is executed. The delayed effect of this instruction is provided to allow interrupts to be enabled just before returning from a procedure (or subroutine). For instance, if an STI instruction is followed by an RET instruction, the RET instruction is allowed to execute before external interrupts are recognized 1 . This behavior allows external interrupts to be disabled at the beginning of a procedure and enabled again at the end of the procedure. If the STI instruction is followed by a CLI instruction (which clears the IF flag), the effect of the STI instruction is negated.

The IF flag and the STI and CLI instructions have no affect on the generation of exceptions and NMI interrupts.

The following decision table indicates the action of the STI instruction (bottom of the table) depending on the processor's mode of operation and the CPL and IOPL of the currently running program or procedure (top of the table).

PE = 0 1 1 1
VM = Don't care 0 0 1
CPL Don't care <= IOPL > IOPL =3
IOPL Don't care Don't care Don't care =3
IF <— 1 Action in Column 1 taken Action in Column 1 taken Action in Column 1 not taken Action in Column 1 taken
#GP(0) Action in Column 1 not taken Action in Column 1 not taken Action in Column 1 taken Action in Column 1 not taken
Operands Bytes Clocks
1 7 NP

Flags

ID unaffected DF unaffected
VIP unaffected IF sets
VIF unaffected TF unaffected
AC unaffected SF unaffected
VM unaffected ZF unaffected
RF unaffected AF unaffected
NT unaffected PF unaffected
IOPL unaffected CF unaffected
OF unaffected

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